1. Field of the Invention
The present invention relates to a delta-sigma modulation circuit, and in particular, to a delta-sigma modulation circuit with a gain control function, with which the optimum S/N can be obtained according to the setting level of a variable gain amplifier.
2. Description of the Background Art
Conventionally, a system using a delta-sigma modulator has been known. The system is used in, for example, an A/D conversion circuit and a D/A conversion circuit for digital audio equipment. As a system such as the one described above, a system exists in which after the signal level is adjusted by a variable gain amplifier the signal is inputted to a delta-sigma modulator. Further, a system is used in which by implementing an automatic gain control (AGC) circuit the signal level is adjusted to an appropriate level and thereafter the signal is delta-sigma modulated.
FIG. 12 is a diagram showing, as a first conventional example, a configuration of a delta-sigma modulation circuit with a variable gain amplifier, which employs a single-stage first-order delta-sigma modulator.
An external signal is first inputted to a variable gain amplifier 1. The gain of the variable gain amplifier 1 is controlled by a control signal CS1 outputted from a digital signal processor (DSP) 2.
A first-order delta-sigma modulator 3 is composed of an adder-subtractor 8 that subtracts a feedback reference level (+VREF or −VREF) from an output signal X from the variable gain amplifier 1; an integrator 9 that inputs an output signal from the adder-subtractor 8; a quantizer 6 that quantizes an output from the integrator 9 to predetermined bits; and a level fixed feedback circuit 31 that generates the feedback reference level based on a digital output signal Y from the quantizer 6. The integrator 9 and the adder-subtractor 8 compose an integration circuit 5.
An output signal Y from the delta-sigma modulator 3 is inputted to a filter circuit 4 where a necessary signal band is extracted. Note that in FIG. 12 the symbol Q denotes a quantization error generated between before and after the quantizer 6.
In such a delta-sigma modulation circuit, to reduce the noise component contained in the output signal Y from the delta-sigma modulator 3, a method of reducing the gain of the delta-sigma modulator 3 to 1/A (A is an arbitrary numeric value greater than 1) is used. This approach is based on the consideration that the delta-sigma modulator 3 in FIG. 12 has such noise characteristics as those shown in FIG. 13, with respect to the amplitude level of the input signal X. The curve in FIG. 13 represents the characteristics, in the delta-sigma modulator 3, of the quantization noise level contained in the amplitude level of the output signal Y, with respect to the amplitude level of the input signal X.
In the delta-sigma modulator 3, as shown in FIG. 13, when the amplitude level of the input signal X to the delta-sigma modulator 3 approximates the feedback reference level VREF, the situation called “overload” occurs where the quantization noise level contained in the amplitude level of the output signal Y increases. In view of this, the value of the feedback reference level is set such that the maximum amplitude level of the positive and negative portions of the input signal X with respect to the positive and negative portions of the feedback reference level (±VREF) is 1/A. For example, if the overload level is 0.8 VREF and the maximum value of the amplitude level of the input signal X is given as XMAX, the feedback reference level VREF is set as follows:VREF=XMAX÷0.8=1.25·XMAX  (1)
In this case, the gain (1/A) of the delta-sigma modulator 3 has the following value:XMAX÷(1.25·XMAX)=0.8  (2)
By thus reducing the gain of the delta-sigma modulator 3 to 1/A, the occurrence of an overload situation is prevented. Instead, by providing gain A (which is called the “scaling coefficient”) to the subsequent filter circuit 4, the gain limited in the delta-sigma modulator 3 can be compensated. By performing such scaling, noise can be effectively reduced. In the example in equations (1) and (2), the scaling coefficient A is 1.25.
The variable gain amplifier 1 can set an arbitrary gain by a control signal CS1 from the DSP 2. Here, as an example, the case is described where the maximum value of the amplitude level of an input signal to the variable gain amplifier 1 is given as VMAX, the gain of the variable gain amplifier 1 is given as Ga, and the scaling coefficient is given as Aa.
In this case, if the maximum value of the amplitude level of an input signal X to the delta-sigma modulator 3 is given as XMAX, the maximum value XMAX can be expressed as follows:XMAX=VMAX·Ga Hence, the amplitude level of an output signal Y from the delta-sigma modulator 3 shown in FIG. 12 can be represented by the following transfer function if the scaling coefficient is given as A:
                                                        Y              =                                                                    X                    MAX                                    /                  Aa                                +                                                      (                                          1                      -                                              Z                                                  -                          1                                                                                      )                                    ⁢                                                                          ⁢                  Q                                                                                                        =                                                                    V                    MAX                                    ·                                      Ga                    /                    Aa                                                  +                                                      (                                          1                      -                                              Z                                                  -                          1                                                                                      )                                    ⁢                                                                          ⁢                                      Q                    .                                                                                                          (        3        )            
The output Dout from the filter circuit 4 is represented by the following function:
                                                        Dout              =                              Y                ·                Aa                                                                                        =                                                                    V                    MAX                                    ·                  Ga                                +                                                      (                                          1                      -                                              Z                                                  -                          1                                                                                      )                                    ⁢                                                                          ⁢                                      Q                    ·                    Aa                                                                                                          (        4        )            
The result of equation (4) shows that the quantization noise contained in the output signal from the delta-sigma modulator 3 is proportional to the scaling coefficient Aa. Thus, it can be seen that to reduce the quantization noise the scaling coefficient Aa needs to be set as low as possible. In FIG. 12, the scaling coefficient of the delta-sigma modulator 3 is set to a value that does not cause an overload situation even if the maximum signal amplitude level to be inputted to the delta-sigma modulator 3, i.e., the signal of VMAX·Ga, is inputted to the delta-sigma modulator 3.
FIG. 14 is a block diagram showing, as a second conventional example, an A/D conversion circuit with an AGC circuit, which employs a single-stage first-order delta-sigma modulator 3. The A/D conversion circuit is composed of an AGC circuit 12, the delta-sigma modulator 3, and a digital filter circuit 13.
An external analog input signal is first inputted to the AGC circuit 12. The AGC circuit 12 is composed of a variable gain amplifier 1 which inputs the analog signal and whose amplification factor is changed by a control signal CS5; a level detection circuit 15 that detects an amplitude of an output signal from the variable gain amplifier 1 and outputs a signal level according to the amplitude; a reference level generator 16 that outputs a reference level; and a comparator 14 that compares the signal level outputted from the level detection circuit 15 with the reference level, and outputs a control signal CS5 to the variable gain amplifier 1 according to the comparison result. By this, the AGC circuit 12 functions to output, even if the level of the analog input signal is changed, the signal from the variable gain amplifier 1 with the peak value of the signal level being maintained at ±V1.
The first-order delta-sigma modulator 3 is composed of an adder-subtractor 8 that subtracts a feedback reference level (+VREF or −VREF) from an output signal from the AGC circuit 12; an integrator 9 that inputs an output signal from the adder-subtractor 8; a quantizer 6 that quantizes an output from the integrator 9 to a 1-bit digital signal; and a level fixed feedback circuit 31 that generates the feedback reference level based on a digital output signal Y from the quantizer 6. The integrator 9 and the adder-subtractor 8 compose an integration circuit 5. The level fixed feedback circuit 31 is composed of a 1-bit DA converter.
A 1-bit output signal Y from the delta-sigma modulator 3 is inputted, as a digital code, to the digital filter circuit 13 where the low-frequency component of the output signal Y, which corresponds to an analog input signal component, is extracted, and the extracted low-frequency component is converted into digital data of a predetermined number of bits.
The scaling coefficient of the above delta-sigma modulation type A/D conversion circuit is set to A (A is an arbitrary numeric value greater than 1). The scaling coefficient A is obtained by setting, as described above, the magnitude of the feedback reference level such that the output holding level of the AGC circuit 12 with respect to the feedback reference level is 1/A. The gain A of the digital filter circuit 13 is obtained by allowing the impulse response coefficient of the digital filter circuit 13 to have a gain.
Note that in FIG. 14 the symbol Q denotes a quantization error generated between before and after the quantizer 6.
In FIG. 14, the output holding level of the AGC circuit 12 is determined according to a dynamic range necessary for the output of the AGC circuit 12. Thus, it is often the case that the AGC circuit 12 is used with a plurality of holding amplitude levels being switched from one to another.
In such a delta-sigma modulation type A/D conversion circuit having a switching function of the output holding amplitude level of the AGC circuit 12, the feedback reference level, i.e., the scaling coefficient A, of the delta-sigma modulator 3 is set in accordance with the maximum value of the output holding level of the AGC circuit 12, to prevent the occurrence of an overload situation.
Patent document 1: Japanese Laid-Open Patent Publication No. 08-018457
Now, the case is described where in the delta-sigma modulation circuit with a variable gain amplifier, which employs a single-stage first-order delta-sigma modulator 3, as shown in FIG. 12 as the first conventional example, the gain of the variable gain amplifier 1 is switched between Ga, Gb, and Gc. The scaling coefficient A of the delta-sigma modulator 3 is set in accordance with VMAX·Ga which represents the maximum value of the amplitude level of an input signal X. If the value of the scaling coefficient A is given as Aa fixed, the outputs Dout from the filter circuit 4 for three gain settings Ga, Gb, and Gc are represented by the following functions.
First, if the outputs from the first-order delta-sigma modulator 3 are given as Ya, Yb, and Yc, respectively, the outputs Ya, Yb, and Yc can be expressed as follows:Ya=VMAX·Ga/Aa+(1−Z−1)Q  (5)Yb=VMAX·Gb/Aa+(1−Z−1)Q  (6)Yc=VMAX·G/Aa+(1−Z−1)Q  (7)
If the outputs from the filter circuit 4 are given as Douta, Doutb, and Doutc, respectively, the outputs Douta, Doutb, and Doutc can be expressed as follows:Douta=VMAX·Ga+(1−Z−1)Q·Aa  (8)Doutb=VMAX·Gb+(1−Z−1)Q·Aa  (9)Doutc=VMAX·Gc+(1−Z−1)Q·Aa  (10)
Comparing between equations (8) to (10), although the gain settings Ga to Gc for the signal component are different from one another, (1−Z−1)Q·Aa which represents the quantization noise component is fixed, the conditions of which are shown in FIG. 15.
FIG. 15 is a diagram showing the amplitude level of an output signal Y from the delta-sigma modulator 3 and the noise level contained in the amplitude level of the output signal Y, with respect to the amplitude level of an input signal X to the delta-sigma modulator 3. By reducing the gain of the variable gain amplifier 1 from Ga to Gb, and then to Gc, the difference between the signal level and the quantization noise level is reduced; accordingly, it can be seen that the dynamic range is reduced.
Now, the case is described where in the A/D conversion circuit with an AGC circuit, which employs a single-stage first-order delta-sigma modulator, as shown in FIG. 14 as the second conventional example, the AGC circuit 12 has the function of switching three output holding amplitude levels from one to another by a control signal CS1 from the DSP 2.
FIG. 16 is a diagram showing the output amplitude level dependence of the AGC circuit 12 having the function of switching three output holding amplitude levels from one to another, with respect to the input signal amplitude level. In this case, in the A/D conversion circuit with an AGC function shown in FIG. 14, the scaling coefficient A of the delta-sigma modulator 3 is set in accordance with V1 which represents the maximum value of the output holding amplitude level. If the value of the scaling coefficient A is given as A1 fixed, the outputs Dout from the digital filter circuit 13 for three output holding amplitude levels V1, V2, and V3 are represented by the following functions.
First, if the outputs from the first-order delta-sigma modulator 3 are given as Y1, Y2, and Y3, respectively, the outputs Y1, Y2, and Y3 can be expressed as follows:Y1=V1/A1+(1−Z−1)Q  (11)Y2=V2/A1+(1−Z−1)Q  (12)Y3=V3/A1+(1−Z−1)Q  (13)
If the outputs from the digital filter circuit 13 are given as Dout1, Dout2, and Dout3, respectively, the outputs Dout1, Dout2, and Dout3 can be expressed as follows:Dout1=V1+(1−Z−1)Q·A1  (14)Dout2=V2+(1−Z−1)Q·A1  (15)Dout3=V3+(1−Z−1)Q·A1  (16)
Comparing between equations (14) to (16), although the signal components V1 to V3 are different from one another, (1−Z−1)Q·A1 which represents the quantization noise component is fixed, the conditions of which are shown in FIG. 17. FIG. 17 is a diagram showing the amplitude level of an output signal Y from the delta-sigma modulator 3 and the noise level contained in the amplitude level of the output signal Y, with respect to the amplitude level of an input signal X to the delta-sigma modulator 3. By reducing the output holding amplitude level from V1 to V2, and then to V3, the difference between the signal level and the quantization noise level is reduced; accordingly, it can be seen that the dynamic range is reduced.